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Analog/Mixed Signal System Test Engineer Intern

Astera LabsAdded 2h ago

San Jose, CAInternship

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Quick summaryby newgrad.ai

What you'll do

  • Verify advanced CMOS circuits like PLLs, ADCs, and high-speed interconnects.
  • Perform lab chip bring-up, data collection, and circuit debugging.
  • Automate testing processes using Python, Matlab, or C.

What they're looking for

  • Currently pursuing a Master’s or PhD in Electrical Engineering.
  • Experience validating high-speed mixed-signal circuits and lab equipment.
  • Strong understanding of transistor-level design and noise analysis.

Pay and perks

  • Hourly pay ranging from $38 to $46.
  • Weekly $500 housing and relocation stipend.
  • Access to professional development and early career programming.

As an Analog/Mixed-Signal System test Engineer Intern, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs for electrical and optical interconnect to meet performance targets. The company seeks a highly motivated designer for this role

Basic Qualifications

  • Pursuing a Master’s or PhD degree in EE is preferred

Desired Experience

  • Hands-on experience in designing or validating high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution are other high-speed analog circuits is a must
  • Strong experience in lab chip bring-up, automation, data collection, data analysis and debugging efforts.
  • Experience with lab equipment (UXR, DCA, VNA, PNA, BERT, etc)
  • Excellent programming/scripting ability in Python, Matlab, or C.
  • Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a plus
  • Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
  • Knowledge of optical transceivers, TIA design and drivers for optical applications is highly desirable
  • Strong technical independent contributor with a proven ability to drive results.
  • Excellent teamwork, presentation, and documentation skills.
  • Relevant research publications and/or patents in analog or RF IC design.
  • Experience with PCB design is a plus
  • Familiarity with Verilog RTL or DSP design concepts is a plus

Internship experience and compensation

This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level ranges from $38/hour to $46/hour.

U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship.

Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

From Astera Labs's public posting, laid out for reading by newgrad.ai with the wording unchanged. Check the original before you apply.

Apply on Astera Labs's site.

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