# R&D DSP/FPGA Design Automation Intern at Keysight Technologies - Company: [Keysight Technologies](https://keysight.com) - Location: Santa Rosa, CA - Type: Internship · Internship - Posted: 2026-11-04 - Apply: https://jobs.keysight.com/jobs/55153?icims=1 - Page: https://newgrad.ai/jobs/r-d-dsp-fpga-design-automation-intern-e1ad677a ## Summary by newgrad.ai What you'll do: - Develop FPGA components for DSP systems and integrate them into subsystems. - Create automated verification tests and reference models for numerical accuracy. - Research AI-assisted tools to improve FPGA design, implementation, and documentation workflows. - Collaborate with engineering teams to analyze performance and present final project results. What they're looking for: - Current Bachelor’s or Master’s student in EE, CE, CS, or related fields. - Proficiency in HDL languages like Verilog, SystemVerilog, or VHDL. - Experience with Python, MATLAB, or C/C++ for automation and modeling. - Knowledge of digital logic, synchronous design, and fixed-point DSP arithmetic. Pay and perks: - Pay range: $41.14 to $44.31 per hour for California. - Relocation assistance is available. ## Posting ### Overview Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. ### Job Description We are seeking a motivated R&D intern to help develop and demonstrate a scalable, AI-assisted development workflow for FPGA-based digital signal processing systems. This position is well suited to a student who enjoys working across traditional boundaries between signal processing, digital design, and software development. You will gain experience with a complete FPGA development lifecycle while investigating how AI-assisted engineering can improve development speed, reuse, and consistency without replacing sound engineering judgment. ### Responsibilities - Build reusable, parameterized FPGA components for DSP, such as MACs, FIFOs, adder trees, coefficient memories, delay elements and numeric conversion blocks. - Translate DSP and system requirements into FPGA architecture and implementation specs. - Design and verify RTL in Verilog, SystemVerilog, VHDL or an equivalent language. - Write bit-accurate or fixed-point reference models to check the FPGA implementations against. - Assemble the components into a representative streaming DSP subsystem. - Create automated simulation and verification tests that cover numerical accuracy, reset behavior, streaming interfaces, backpressure and parameter boundaries. - Support synthesis, timing analysis, resource evaluation and optimization. - Use Python or a similar language to automate design, testing, data collection and reporting. - Investigate AI-assisted development tools across FPGA architecture, implementation, verification and documentation. Define objective ways to measure the quality of their output. - Analyze results and identify functional, numerical, timing or resource limitations. - Collaborate with DSP, FPGA, software and system engineers, including in design reviews. - Document interfaces, parameter constraints, verification results and findings. - Present results and recommendations to the engineering team at the end of the internship. ### Qualifications Required - Currently pursuing a Bachelor's or Master's in EE, CE, CS or a related field. - Coursework, project work or job experience in DSP or digital system design. - Understanding of digital logic, synchronous design, pipelining and FSMs. - Experience with at least one HDL or hardware-construction language (Verilog, SystemVerilog, VHDL or Chisel). - Experience with Python, MATLAB, C/C++ or a similar language for modeling or automation. - Familiarity with fixed-point arithmetic, quantization or numerical implementation of DSP algorithms. - Ability to turn requirements into an implementable design. - Ability to analyze technical results and communicate conclusions clearly. - Strong problem-solving, communication and teamwork skills. - Ability and desire to learn emerging technologies. Desired - Experience designing, simulating or synthesizing FPGA logic, with Xilinx/AMD, Intel or comparable tools. - Experience with streaming interfaces (valid/ready, FIFOs, clock domains). - Experience implementing FIR filters, resamplers, channelizers or other waveform processing. - Experience writing parameterized, reusable HDL. - Experience with cocotb, constrained-random testing, assertions or formal verification. - Experience with Git, CI, automated builds or regression testing. - Experience building software tools for other engineers. - Experience using AI-assisted tools for software, HDL, testing or analysis. - Familiarity with component metadata, interface contracts, model-based design or digital twins. - Interest in FPGA tradeoffs among throughput, latency, timing and DSP, memory and logic resources. The level of role will be based on applicable experience, education and skills; most offers will be between the minimum and midpoint of the salary range listed below. CA pay range: MIN $41.14 to MAX $44.31 Note: for other locations, pay ranges will vary by region. Relocation is available for this position. Visa Sponsorship is not available for this position. Careers Privacy Statement*Keysight is an Equal Opportunity Employer.* From Keysight Technologies's public posting, laid out for reading by newgrad.ai with the wording unchanged. Check the original before you apply. --- More new-grad and intern roles: https://newgrad.ai/llms.txt