ASIC Engineer Intern - Formal Verification
MetaAdded 3h ago
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Quick summaryby newgrad.ai
What you'll do
- Develop formal verification plans and testbenches for hardware accelerators.
- Write assertions to verify design intent and analyze counterexamples.
- Collaborate with experienced engineers on complex IP and sub-systems.
What they're looking for
- Availability for a 12 to 16-week internship duration.
- Interest in formal verification methodologies for ASIC design.
- Ability to translate hardware specifications into formal properties.
Meta is seeking an ASIC Engineer Intern, Formal Verification to join our Infrastructure Silicon organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. In this role, you will be an integral member of an ASIC team building accelerators for some of our top workloads, enabling our data centers to scale efficiently.
You will have an opportunity to apply formal verification tools and methodologies to advanced IPs and sub-systems. Working alongside experienced ASIC engineers, you will contribute to formal verification planning, assertion development, formal testbench development and proof analysis on a scoped project of your own. You will learn to translate design intent into properties, analyze counterexamples and help establish the correctness of hardware designs. Come work and learn alongside our expert ASIC engineers to build "Green" data center accelerators.
Internships are twelve (12) to sixteen (16) weeks long
From Meta's public posting, laid out for reading by newgrad.ai with the wording unchanged. Check the original before you apply.
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