# Analog Mixed Signal Engineer Intern at Astera Labs

- Company: [Astera Labs](https://asteralabs.com)
- Location: San Jose, CA +1 more
- Type: Internship · Internship
- Posted: 2026-10-09
- Apply: https://job-boards.greenhouse.io/asteraearlycareer2027/jobs/4739767005
- Page: https://newgrad.ai/jobs/analog-mixed-signal-engineer-intern-0a084a9e

## Summary by newgrad.ai

What you'll do:

- Design and verify analog/mixed-signal circuits including PLLs, DLLs, ADCs, regulators, amplifiers, and CDRs
- Work on analog and clocking blocks for connectivity applications using Spectre and MATLAB
- Meet performance targets for advanced node CMOS products

What they're looking for:

- Pursuing Master's or PhD in EE
- Hands-on experience designing high-speed mixed-signal circuits like ADCs, RX front-ends, and low-jitter PLLs
- Deep understanding of biasing, bandgaps, opamps, and comparators
- Design and tapeout experience in advanced CMOS nodes (20nm or newer)
- Strong transistor-level design and noise/jitter analysis skills

Pay and perks:

- Paid hourly internship at $47-$70/hour based on education level
- $500/week housing/relocation stipend
- Early Career programming with technical and professional development sessions

## Posting

As an Analog/Mixed-Signal IC Design Engineer Intern, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB. The company seeks a highly motivated designer for this role

### Basic Qualifications

- Pursuing a Master's or PhD degree in EE

### Desired Experience

- Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution are other high-speed analog circuits is a must

- Have a deep understanding of biasing, band-gaps, reference circuits, opamps, comparators and other analog circuits

- Solid track-record for implementation of analog circuits high-speed data transmission.

- Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a must

- Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.

- Knowledge of TIA design and drivers for optical applications is highly desirable

- Experience in RFIC design for wireless or wireline communication systems is highly desirable.

- Strong technical independent contributor with a proven ability to drive results.

- Excellent teamwork, presentation, and documentation skills.

- Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.

- Strong experience in lab chip bring-up and debugging efforts.

- Relevant research publications and/or patents in analog or RF IC design.

- Familiarity in programming/scripting languages such as Python, Matlab, or C.

- Experience with PCB design.

- Familiarity with Verilog RTL or DSP design concepts.

- Knowledge of optical transceivers.

- Expertise in ESD protection techniques and IC packaging methodologies.

### Internship experience and compensation

This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level ranges form $47-$70/hour. U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship. Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

From Astera Labs's public posting, laid out for reading by newgrad.ai with the wording unchanged. Check the original before you apply.

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